Arithmetic Logic Unit
Project Overview
In this project I designed and implemented an 8-bit Arithmetic Logic Unit (ALU) using 45nm CMOS technology within Cadence Virtuoso. An ALU is a digital circuit within a computers CPU that performs fundamental arithmentic The work involved creating custom schematics and physical layouts for core digital components such as logic gates, full adders, subtractors, and multipliers, ensuring that the ALU could reliably perform a variety of arithmetic and logical operations.
To validate the design, I carried out extensive verification steps, successfully passing both Design Rule Check (DRC) and Layout Versus Schematic (LVS) reports to confirm physical and logical consistency. This project deepened my understanding of digital circuit design, CMOS layout constraints, and performance optimization, while reinforcing practical skills in using industry standard EDA tools for VLSI development.
